In mobile information terminals such as a mobile phone and PDA, the demands for the reduction in weight and thickness and the improvement in display quality in the display apparatus thereof have been increasing in recent years, and therefore, a middle or small size panel of an organic EL display apparatus (hereinafter, also referred to as OLED) having the characteristics of self light emission, no backlight and high contrast ratio has been gradually adopted. Furthermore, the development of a large size OLED panel as a display apparatus for television has been currently activated because the high response speed thereof is suitable for the movie display.
In the OLED panel, the variation in luminance of each pixel formed on a thin-film transistor substrate has to be suppressed in order to improve the image quality. Accordingly, it is indispensable to strictly control the current flowing in a light emission layer of the organic EL element (OLED element) constituting the OLED, and the TFT with small variation in threshold voltage is strongly demanded as the driving TFT provided for each pixel. Also, the improvement in mobility of the TFT is required for the reduction in the power consumption of the OLED panel.
The same is true of the liquid crystal display apparatus (hereinafter, also referred to as LCD). The LCD is formed by sealing liquid crystal between each pixel electrode formed on a thin-film transistor substrate and a color filter substrate. The improvement in mobility of the TFT is required for the reduction in the power consumption and the higher definition of the LCD.
For these reasons, the TFT using a low-temperature polycrystalline silicon film formed by the laser annealing method is used in many of the existing middle or small size panels. However, the formation of the polycrystalline silicon TFT by this method is unsuitable for the large size panel. This is because, since there is a limit on the area of an amorphous-silicon film that can be crystallized by the laser irradiation at one time, the laser annealing process has to be repeatedly carried out for forming the same TFTs on the large substrate, which results in the increase in the process cost.
In the meantime, the polycrystalline silicon film can be formed by the method other than the laser annealing. For example, it can be formed by heating the substrate to about 600° C., which is higher than the crystallization temperature of Si, by the thermal chemical vapor deposition (CVD) method. However, since the glass substrate whose softening temperature is 600° C. or lower is used for the large size OLED panel, the application of the thermal CVD method is difficult. Furthermore, although the polycrystalline silicon film can be formed at a lower temperature by the plasma enhanced chemical vapor deposition method, since the incubation layer containing the amorphous tissue tends to be formed on an insulating film in the initial stage of the deposition, this deposition method is unsuitable for the application to the bottom-gate TFT in which a channel is formed on the substrate side.
For the reasons above, the technology capable of forming a polycrystalline silicon film directly on an insulating substrate at a low temperature has been required for the driving TFT of a large size panel, and the technology called reactive thermal chemical vapor deposition has been recently proposed.
In the reactive thermal chemical vapor deposition method, disilane (Si2H6) and germanium tetrafluoride (GeF4) are used as source gases, and the polycrystalline silicon germanium (SiGe) film can be formed at a high deposition rate at a temperature lower than the deposition temperature of the usual thermal CVD method by the hydrogen abstraction reaction of fluorine (F) in GeF4 from Si2H6. Since the source gases can be reacted mainly on the substrate surface in this method, the semiconductor crystal nuclei can be directly deposited on a large-area insulating substrate without the amorphous texture, and further, if the crystal growth is performed from the crystal nuclei by using the various types of deposition technologies, the polycrystalline semiconductor film excellent in crystallinity can be formed at a low temperature.
Furthermore, it also has the advantage that the preferred orientation of the polycrystal to be grown can be set to, for example, (111), (110) and (100) by selecting the deposition conditions of the initial semiconductor crystal nuclei and the thickness of the formed initial semiconductor crystal nuclei.
The Patent Document 1 describes a conventional example of the deposition using the reactive thermal CVD method. The example of the deposition of a polycrystalline SiGe film described in this Patent Document 1 will be shown below. In the first example described in the Patent Document 1, with using SiO formed on a silicon wafer as a substrate, GeF4 and Si2H6 are supplied at 2.7 sccm and 20 sccm and He for dilution is supplied at 500 sccm to a reaction container and deposited at 425° C. for 20 minutes while changing the pressure from 15 to 50 torr. As a result, the semiconductor crystal nuclei are produced at the density of about 105 to 106 cm−2 at 15 torr, about 107 to 108 cm−2 at 20 torr, about 108 to 109 cm−2 at 25 torr and about 109 to 1010 cm−2 at 50 torr.
Next, on the semiconductor crystal nuclei formed on the substrate, the growth is continued while reducing the growth temperature to 375° C. In this manner, the SiGe polycrystalline film with high crystallinity is formed. Also, in the second example described in the Patent Document 1, after the deposition of the semiconductor crystal nuclei, silane, silane fluoride and hydrogen are supplied at the flow rate of 2 sccm, 98 sccm and 50 sccm, respectively, and the Si polycrystalline film is formed at 400° C. by the glow discharge decomposition method at the pressure of 1 torr.
Furthermore, in the third example described in the Patent Document 1, after the deposition of the semiconductor crystal nuclei, the Si polycrystalline film is formed at 300° C. by the radio-frequency (rf) glow discharge method using the hydrogen-diluted silane (2%).